Automatic test equipment (ATE) is universally used to test semi-conductor chips and integrated circuits during their manufacture. Functional testing is typically performed by configuring the ATE to apply electrical signals to numerous connection points on the device under test (DUT) while measuring the output response of the DUT at certain connection points.
ATE typically determines the relative timing between applied input signals and measured output signals when evaluating the performance of a DUT. Very accurate timing of the test system clock is often required to ensure that appropriate data is collected, particularly when evaluating a DUT's response to high speed signals.
It is often desirable to test the performance of a DUT relative to its own system clock. Accordingly, ATE can typically be configured to measure output at times relative to the DUT's internal clock. However, measurements relative to the DUT's system clock can be inaccurate at high data rates and clock speeds because signal slewing and jitter significantly affect measurement results.
Many integrated circuits (ICs) now include buses with a synchronous clock that accompanies the data. It is impractical to access a DUT's synchronous internal clock without tying up valuable test system hardware channels. It has also heretofore been problematic to use a test system clock to test data on buses having a synchronous clock because data on the bus may have very high jitter relative to the test system clock.